------------------------------------------------------------------
--  Package fsim_logic    Version 1.1
--
--  Date Created : June 2012    
--  AUTHOR : Joanne E. DeGroat, PhD
--
--  Intended Purpose : Inject faults randomly into Designs Under Test to
--  observe their performance under fault.
--  
--  Side effects : none 
--
--  To employ this type in a design completed with type std_logic simply change all
--    declarations of type std_logic to fsim_logic and type std_logic_vector to fsim_logic_vector.
--  This type would not be useful in testbenches so type conversion functions
--    to/from bit and bit_vector are included.
--
--  MODIFICATION History
--  November 19, 2012 - vector type converion functions added
------------------------------------------------------------------
-- Fault Simulation Package
------------------------------------------------------------------
PACKAGE fsim_logic IS   -- The Logic Value System
    
TYPE fsim_ulogic IS ('U', --Uninitialized
                     'X', --Forcing Unknown
                     '0', --Forcing 0
                     '1',  --Forcing 1
                     'Z', --High Impedance
                     'W', --Weak Unknown
                     'L', --Weak 0
                     'H', --Weak 1
                     '-'  --Don't care
                    );
------------------------------------------------------------------
-- unconstrained array of fsim_ulogic
------------------------------------------------------------------
TYPE fsim_ulogic_vector IS ARRAY (NATURAL RANGE <>) OF fsim_ulogic;
    
------------------------------------------------------------------
-- Resolution Function
------------------------------------------------------------------
FUNCTION resolved (s: fsim_ulogic_vector) RETURN fsim_ulogic;

------------------------------------------------------------------
-- Declare fault injection fsim_logic type
------------------------------------------------------------------
SUBTYPE fsim_logic IS resolved fsim_ulogic;

------------------------------------------------------------------
-- Declare fault injection fsim_logic_vector type
------------------------------------------------------------------
TYPE fsim_logic_vector IS ARRAY (NATURAL RANGE <>) of fsim_logic;

------------------------------------------------------------------
-- Declare logic functions
------------------------------------------------------------------
FUNCTION "AND"  (l : fsim_ulogic; r : fsim_ulogic) RETURN fsim_ulogic;
FUNCTION "NAND" (l : fsim_ulogic; r : fsim_ulogic) RETURN fsim_ulogic;
FUNCTION "OR"   (l : fsim_ulogic; r : fsim_ulogic) RETURN fsim_ulogic;
FUNCTION "NOR"  (l : fsim_ulogic; r : fsim_ulogic) RETURN fsim_ulogic;
FUNCTION "XOR"  (l : fsim_ulogic; r : fsim_ulogic) RETURN fsim_ulogic;
FUNCTION "XNOR" (l : fsim_ulogic; r : fsim_ulogic) RETURN fsim_ulogic;
FUNCTION "NOT"  (l : fsim_ulogic                 ) RETURN fsim_ulogic;
------------------------------------------------------------------
-- Declare logic functions - vector versions
------------------------------------------------------------------
FUNCTION "AND"  (l,r : fsim_ulogic_vector) RETURN fsim_ulogic_vector;
FUNCTION "AND"  (l,r : fsim_logic_vector) RETURN fsim_logic_vector;

FUNCTION "NAND" (l,r : fsim_ulogic_vector) RETURN fsim_ulogic_vector;
FUNCTION "NAND" (l,r : fsim_logic_vector) RETURN fsim_logic_vector;

FUNCTION "OR"   (l,r : fsim_ulogic_vector) RETURN fsim_ulogic_vector;
FUNCTION "OR"   (l,r : fsim_logic_vector) RETURN fsim_logic_vector;

FUNCTION "NOR"  (l,r : fsim_ulogic_vector) RETURN fsim_ulogic_vector;
FUNCTION "NOR"  (l,r : fsim_logic_vector) RETURN fsim_logic_vector;

FUNCTION "XOR"  (l,r : fsim_ulogic_vector) RETURN fsim_ulogic_vector;
FUNCTION "XOR"  (l,r : fsim_logic_vector) RETURN fsim_logic_vector;

FUNCTION "XNOR" (l,r : fsim_ulogic_vector) RETURN fsim_ulogic_vector;
FUNCTION "XNOR" (l,r : fsim_logic_vector) RETURN fsim_logic_vector;

FUNCTION "NOT"  (l : fsim_ulogic_vector) RETURN fsim_ulogic_vector;
FUNCTION "NOT"  (l : fsim_logic_vector ) RETURN fsim_logic_vector;
------------------------------------------------------------------
--TYPE conversion functions
------------------------------------------------------------------
FUNCTION to_bit (l : fsim_ulogic) RETURN bit;
FUNCTION to_bit_vector (l : fsim_ulogic_vector) RETURN bit_vector;
FUNCTION to_bit_vector (l : fsim_logic_vector) RETURN bit_vector;
FUNCTION to_fsim_ulogic (l : bit) RETURN fsim_ulogic;
FUNCTION to_fsim_ulogic_vector (l : bit_vector) RETURN fsim_ulogic_vector;
FUNCTION to_fsim_logic_vector (l : bit_vector) RETURN fsim_logic_vector;
------------------------------------------------------------------
-- Rising and Falling Edge
------------------------------------------------------------------


------------------------------------------------------------------
-- Function to return random number and error threshold
CONSTANT threshold : REAL := 1.0;
impure FUNCTION getrand RETURN real;

END fsim_logic;

LIBRARY ieee;
USE ieee.math_real.ALL;
PACKAGE BODY fsim_logic IS
------------------------------------------------------------------
-- local types
------------------------------------------------------------------
TYPE fsimlogic_1d IS ARRAY (fsim_ulogic) of fsim_ulogic;
TYPE fsimlogic_table IS ARRAY (fsim_ulogic,fsim_ulogic) of fsim_ulogic;
TYPE tobitconv_table IS ARRAY (fsim_ulogic) of bit;
TYPE tofsim_logicconv_table IS ARRAY (bit) of fsim_ulogic;

shared VARIABLE seed1 : INTEGER := 500045;
shared VARIABLE seed2 : INTEGER := 100001;
------------------------------------------------------------------
-- resolution function
------------------------------------------------------------------
CONSTANT resolution_table : fsimlogic_table := (
--    -----------------------------------------------
--    | U    X    0    1    Z    W    L    H    -
--    -----------------------------------------------
      ('U', 'U', 'U', 'U', 'U', 'U', 'U', 'U', 'U'),   -- U
      ('U', 'X', 'X', 'X', 'X', 'X', 'X', 'X', 'X'),   -- X
      ('U', 'X', '0', 'X', '0', '0', '0', '0', 'X'),   -- 0 
      ('U', 'X', 'X', '1', '1', '1', '1', '1', 'X'),   -- 1 
      ('U', 'X', '0', '1', 'Z', 'W', 'L', 'H', 'X'),   -- Z 
      ('U', 'X', '0', '1', 'W', 'W', 'W', 'W', 'X'),   -- W
      ('U', 'X', '0', '1', 'L', 'W', 'L', 'W', 'X'),   -- L
      ('U', 'X', '0', '1', 'H', 'W', 'W', 'H', 'X'),   -- H
      ('U', 'X', 'X', 'X', 'X', 'X', 'X', 'X', 'X')    -- -
       );
      
FUNCTION resolved (s : fsim_ulogic_vector) RETURN fsim_ulogic IS
   VARIABLE result : fsim_ulogic := 'Z';
BEGIN
   IF (s'LENGTH = 1) THEN RETURN s(s'LOW);
   ELSE
     FOR i in s'RANGE LOOP
       result := resolution_table(result,s(i));
     END LOOP;
   END IF;
   RETURN result;
END resolved;
      
------------------------------------------------------------------
--TABLES for logic functions
------------------------------------------------------------------      
--truth table for "and" functilon
CONSTANT and_table : fsimlogic_table := (
--    -----------------------------------------------
--    | U    X    0    1    Z    W    L    H    -
--    -----------------------------------------------
      ('U', 'U', '0', 'U', 'U', 'U', '0', 'U', 'U'),   -- U
      ('U', 'X', '0', 'X', 'X', 'X', '0', 'X', 'X'),   -- X
      ('0', '0', '0', '0', '0', '0', '0', '0', '0'),   -- 0 
      ('U', 'X', '0', '1', 'X', 'X', '0', '1', 'X'),   -- 1 
      ('U', 'X', '0', 'X', 'X', 'X', '0', 'X', 'X'),   -- Z 
      ('U', 'X', '0', 'X', 'X', 'X', '0', 'X', 'X'),   -- W
      ('0', '0', '0', '0', '0', '0', '0', '0', '0'),   -- L
      ('U', 'X', '0', 'X', 'X', 'X', '0', '1', 'X'),   -- H
      ('U', 'X', 'X', 'X', 'X', 'X', '0', 'X', 'X')    -- -
       );

--truth table for "or" functilon       
CONSTANT or_table : fsimlogic_table := (
--    -----------------------------------------------
--    | U    X    0    1    Z    W    L    H    -
--    -----------------------------------------------
      ('U', 'U', 'U', '1', 'U', 'U', 'U', '1', 'U'),   -- U
      ('U', 'X', 'X', '1', 'X', 'X', 'X', '1', 'X'),   -- X
      ('U', 'X', '0', '1', 'X', 'X', '0', '1', 'X'),   -- 0 
      ('1', '1', '1', '1', '1', '1', '1', '1', '1'),   -- 1 
      ('U', 'X', 'X', '1', 'X', 'X', 'X', '1', 'X'),   -- Z 
      ('U', 'X', 'X', '1', 'X', 'X', 'X', '1', 'X'),   -- W
      ('U', 'X', '0', '1', 'X', 'X', '0', '1', 'X'),   -- L
      ('1', '1', '1', '1', '1', '1', '1', '1', '1'),   -- H
      ('U', 'X', 'X', '1', 'X', 'X', 'X', '1', 'X')    -- -
       );
     
--truth table for "xor" functilon
CONSTANT xor_table : fsimlogic_table := (
--    -----------------------------------------------
--    | U    X    0    1    Z    W    L    H    -
--    -----------------------------------------------
      ('U', 'U', 'U', 'U', 'U', 'U', 'U', 'U', 'U'),   -- U
      ('U', 'X', 'X', 'X', 'X', 'X', 'X', 'X', 'X'),   -- X
      ('U', 'X', '0', '1', 'X', 'X', '0', '1', 'X'),   -- 0 
      ('U', 'X', '1', '0', 'X', 'X', '1', '0', 'X'),   -- 1 
      ('U', 'X', 'X', 'X', 'X', 'X', 'X', 'X', 'X'),   -- Z 
      ('U', 'X', 'X', 'X', 'X', 'X', 'X', 'X', 'X'),   -- W
      ('U', 'X', '0', '1', 'X', 'X', '0', '1', 'X'),   -- L
      ('U', 'X', '1', '0', 'X', 'X', '1', '0', 'X'),   -- H
      ('U', 'X', 'X', 'X', 'X', 'X', 'X', 'X', 'X')    -- -
       );
     
--truth table for "not" function
CONSTANT not_table : fsimlogic_1d := 
--    -----------------------------------------------
--    | U    X    0    1    Z    W    L    H    -
--    -----------------------------------------------
      ('U', 'X', '1', '0', 'X', 'X', '1', '0', 'X' );
------------------------------------------------------------------
--TABLE for error generation
------------------------------------------------------------------ 
CONSTANT error_table : fsimlogic_1d :=
--    -----------------------------------------------
--    | U    X    0    1    Z    W    L    H    -
--    -----------------------------------------------
      ('U', 'X', '1', '0', 'Z', 'W', 'H', 'L', '-' );
--------------------------------------------------------------------
-- Declare overloaded Logic Functions for each of the logic operations
--------------------------------------------------------------------     
FUNCTION "and" (l : fsim_ulogic; r : fsim_ulogic) RETURN fsim_ulogic IS
  VARIABLE val : fsim_ulogic;
  VARIABLE rnd : REAL;
BEGIN
   val := and_table(l,r);
   rnd := getrand;
   IF (rnd > threshold) THEN val := (error_table(val)); END IF;
   RETURN (val);
END "and";

FUNCTION "nand" (l : fsim_ulogic; r : fsim_ulogic) RETURN fsim_ulogic IS
  VARIABLE val : fsim_ulogic;
  VARIABLE rnd : REAL;
BEGIN
   val := not_table(and_table(l,r));
   rnd := getrand;
   IF (rnd > threshold) THEN val := (error_table(val)); END IF;
   RETURN (val);
END "nand";

FUNCTION "or" (l : fsim_ulogic; r : fsim_ulogic) RETURN fsim_ulogic IS

  VARIABLE val : fsim_ulogic;
  VARIABLE rnd : REAL;
BEGIN
   val := or_table(l,r);
   rnd := getrand;
   IF (rnd > threshold) THEN val := (error_table(val)); END IF;
   RETURN (val);
END "or";

FUNCTION "nor" (l : fsim_ulogic; r : fsim_ulogic) RETURN fsim_ulogic IS
  VARIABLE val : fsim_ulogic;
  VARIABLE rnd : REAL;
BEGIN
   val := not_table(or_table(l,r));
   rnd := getrand;
   IF (rnd > threshold) THEN val := (error_table(val)); END IF;
   RETURN (val);
END "nor";

FUNCTION "xor" (l : fsim_ulogic; r : fsim_ulogic) RETURN fsim_ulogic IS
  VARIABLE val : fsim_ulogic;
  VARIABLE rnd : REAL;
BEGIN
   val := xor_table(l,r);
   rnd := getrand;
   IF (rnd > threshold) THEN val := (error_table(val)); END IF;
   RETURN (val);
END "xor";

FUNCTION "xnor" (l : fsim_ulogic; r : fsim_ulogic) RETURN fsim_ulogic IS
  VARIABLE val : fsim_ulogic;
  VARIABLE rnd : REAL;
BEGIN
   val := not_table(xor_table(l,r));
   rnd := getrand;
   IF (rnd > threshold) THEN val := (error_table(val)); END IF;
   RETURN (val);
END "xnor";

FUNCTION "not" (l : fsim_ulogic                  ) RETURN fsim_ulogic IS
  VARIABLE val : fsim_ulogic;
  VARIABLE rnd : REAL;
BEGIN
   val := not_table(l);
   rnd := getrand;
   IF (rnd > threshold) THEN val := (error_table(val)); END IF;
   RETURN (val);
END "not";
--------------------------------------------------------------------
-- VECTOR version of the functions
--------------------------------------------------------------------
FUNCTION "AND"  (l,r : fsim_ulogic_vector) RETURN fsim_ulogic_vector IS
  ALIAS lv : fsim_ulogic_vector (1 to l'LENGTH) IS l;
  ALIAS rv : fsim_ulogic_vector (1 to l'LENGTH) IS r;
  VARIABLE result : fsim_ulogic_vector (1 to l'LENGTH);
  VARIABLE val : fsim_ulogic;
  VARIABLE rnd : REAL;
BEGIN
  IF (l'LENGTH /= r'LENGTH) THEN
    ASSERT FALSE
    REPORT "arguments of overloaded function 'and' are not of the same length"
    SEVERITY FAILURE;
  ELSE
    FOR i IN result'RANGE LOOP
      val := and_table(lv(i),rv(i));
      rnd := getrand;
      IF (rnd > threshold) THEN val := (error_table(val)); END IF;
      result(i) := val;
    END LOOP;
  END IF;
  RETURN result;
END "AND";
  
FUNCTION "AND"  (l,r : fsim_logic_vector) RETURN fsim_logic_vector IS
  ALIAS lv : fsim_logic_vector (1 to l'LENGTH) IS l;
  ALIAS rv : fsim_logic_vector (1 to l'LENGTH) IS r;
  VARIABLE result : fsim_logic_vector (1 to l'LENGTH);
  VARIABLE val : fsim_logic;
  VARIABLE rnd : REAL;
BEGIN
  IF (l'LENGTH /= r'LENGTH) THEN
    ASSERT FALSE
    REPORT "arguments of overloaded function 'and' are not of the same length"
    SEVERITY FAILURE;
  ELSE
    FOR i IN result'RANGE LOOP
      val := and_table(lv(i),rv(i));
      rnd := getrand;
      IF (rnd > threshold) THEN val := (error_table(val)); END IF;
      result(i) := val;
    END LOOP;
  END IF;
  RETURN result;
END "AND";
--------------------------------------------------------------------
FUNCTION "NAND" (l,r : fsim_ulogic_vector) RETURN fsim_ulogic_vector IS
  ALIAS lv : fsim_ulogic_vector (1 to l'LENGTH) IS l;
  ALIAS rv : fsim_ulogic_vector (1 to l'LENGTH) IS r;
  VARIABLE result : fsim_ulogic_vector (1 to l'LENGTH);
  VARIABLE val : fsim_ulogic;
  VARIABLE rnd : REAL;
BEGIN
  IF (l'LENGTH /= r'LENGTH) THEN
    ASSERT FALSE
    REPORT "arguments of overloaded function 'nand' are not of the same length"
    SEVERITY FAILURE;
  ELSE
    FOR i IN result'RANGE LOOP
      val := not_table(and_table(lv(i),rv(i)));
      rnd := getrand;
      IF (rnd > threshold) THEN val := (error_table(val)); END IF;
      result(i) := val;
    END LOOP;
  END IF;
  RETURN result;
END "NAND";

FUNCTION "NAND" (l,r : fsim_logic_vector) RETURN fsim_logic_vector IS
  ALIAS lv : fsim_logic_vector (1 to l'LENGTH) IS l;
  ALIAS rv : fsim_logic_vector (1 to l'LENGTH) IS r;
  VARIABLE result : fsim_logic_vector (1 to l'LENGTH);
  VARIABLE val : fsim_logic;
  VARIABLE rnd : REAL;
BEGIN
  IF (l'LENGTH /= r'LENGTH) THEN
    ASSERT FALSE
    REPORT "arguments of overloaded function 'nand' are not of the same length"
    SEVERITY FAILURE;
  ELSE
    FOR i IN result'RANGE LOOP
      val := not_table(and_table(lv(i),rv(i)));
      rnd := getrand;
      IF (rnd > threshold) THEN val := (error_table(val)); END IF;
      result(i) := val;
    END LOOP;
  END IF;
  RETURN result;
END "NAND";
--------------------------------------------------------------------
FUNCTION "OR"  (l,r : fsim_ulogic_vector) RETURN fsim_ulogic_vector IS
  ALIAS lv : fsim_ulogic_vector (1 to l'LENGTH) IS l;
  ALIAS rv : fsim_ulogic_vector (1 to l'LENGTH) IS r;
  VARIABLE result : fsim_ulogic_vector (1 to l'LENGTH);
  VARIABLE val : fsim_ulogic;
  VARIABLE rnd : REAL;
BEGIN
  IF (l'LENGTH /= r'LENGTH) THEN
    ASSERT FALSE
    REPORT "arguments of overloaded function 'or' are not of the same length"
    SEVERITY FAILURE;
  ELSE
    FOR i IN result'RANGE LOOP
      val := or_table(lv(i),rv(i));
      rnd := getrand;
      IF (rnd > threshold) THEN val := (error_table(val)); END IF;
      result(i) := val;
    END LOOP;
  END IF;
  RETURN result;
END "OR";
  
FUNCTION "OR"  (l,r : fsim_logic_vector) RETURN fsim_logic_vector IS
  ALIAS lv : fsim_logic_vector (1 to l'LENGTH) IS l;
  ALIAS rv : fsim_logic_vector (1 to l'LENGTH) IS r;
  VARIABLE result : fsim_logic_vector (1 to l'LENGTH);
  VARIABLE val : fsim_logic;
  VARIABLE rnd : REAL;
BEGIN
  IF (l'LENGTH /= r'LENGTH) THEN
    ASSERT FALSE
    REPORT "arguments of overloaded function 'or' are not of the same length"
    SEVERITY FAILURE;
  ELSE
    FOR i IN result'RANGE LOOP
      val := or_table(lv(i),rv(i));
      rnd := getrand;
      IF (rnd > threshold) THEN val := (error_table(val)); END IF;
      result(i) := val;
    END LOOP;
  END IF;
  RETURN result;
END "OR";
--------------------------------------------------------------------
FUNCTION "NOR"  (l,r : fsim_ulogic_vector) RETURN fsim_ulogic_vector IS
  ALIAS lv : fsim_ulogic_vector (1 to l'LENGTH) IS l;
  ALIAS rv : fsim_ulogic_vector (1 to l'LENGTH) IS r;
  VARIABLE result : fsim_ulogic_vector (1 to l'LENGTH);
  VARIABLE val : fsim_ulogic;
  VARIABLE rnd : REAL;
BEGIN
  IF (l'LENGTH /= r'LENGTH) THEN
    ASSERT FALSE
    REPORT "arguments of overloaded function 'nor' are not of the same length"
    SEVERITY FAILURE;
  ELSE
    FOR i IN result'RANGE LOOP
      val := not_table(or_table(lv(i),rv(i)));
      rnd := getrand;
      IF (rnd > threshold) THEN val := (error_table(val)); END IF;
      result(i) := val;
    END LOOP;
  END IF;
  RETURN result;
END "NOR";
  
FUNCTION "NOR"  (l,r : fsim_logic_vector) RETURN fsim_logic_vector IS
  ALIAS lv : fsim_logic_vector (1 to l'LENGTH) IS l;
  ALIAS rv : fsim_logic_vector (1 to l'LENGTH) IS r;
  VARIABLE result : fsim_logic_vector (1 to l'LENGTH);
  VARIABLE val : fsim_logic;
  VARIABLE rnd : REAL;
BEGIN
  IF (l'LENGTH /= r'LENGTH) THEN
    ASSERT FALSE
    REPORT "arguments of overloaded function 'nor' are not of the same length"
    SEVERITY FAILURE;
  ELSE
    FOR i IN result'RANGE LOOP
      val := not_table(or_table(lv(i),rv(i)));
      rnd := getrand;
      IF (rnd > threshold) THEN val := (error_table(val)); END IF;
      result(i) := val;
    END LOOP;
  END IF;
  RETURN result;
END "NOR";
--------------------------------------------------------------------
FUNCTION "XOR"  (l,r : fsim_ulogic_vector) RETURN fsim_ulogic_vector IS
  ALIAS lv : fsim_ulogic_vector (1 to l'LENGTH) IS l;
  ALIAS rv : fsim_ulogic_vector (1 to l'LENGTH) IS r;
  VARIABLE result : fsim_ulogic_vector (1 to l'LENGTH);
  VARIABLE val : fsim_ulogic;
  VARIABLE rnd : REAL;
BEGIN
  IF (l'LENGTH /= r'LENGTH) THEN
    ASSERT FALSE
    REPORT "arguments of overloaded function 'or' are not of the same length"
    SEVERITY FAILURE;
  ELSE
    FOR i IN result'RANGE LOOP
      val := xor_table(lv(i),rv(i));
      rnd := getrand;
      IF (rnd > threshold) THEN val := (error_table(val)); END IF;
      result(i) := val;
    END LOOP;
  END IF;
  RETURN result;
END "XOR";
  
FUNCTION "XOR"  (l,r : fsim_logic_vector) RETURN fsim_logic_vector IS
  ALIAS lv : fsim_logic_vector (1 to l'LENGTH) IS l;
  ALIAS rv : fsim_logic_vector (1 to l'LENGTH) IS r;
  VARIABLE result : fsim_logic_vector (1 to l'LENGTH);
  VARIABLE val : fsim_logic;
  VARIABLE rnd : REAL;
BEGIN
  IF (l'LENGTH /= r'LENGTH) THEN
    ASSERT FALSE
    REPORT "arguments of overloaded function 'or' are not of the same length"
    SEVERITY FAILURE;
  ELSE
    FOR i IN result'RANGE LOOP
      val := xor_table(lv(i),rv(i));
      rnd := getrand;
      IF (rnd > threshold) THEN val := (error_table(val)); END IF;
      result(i) := val;
    END LOOP;
  END IF;
  RETURN result;
END "XOR";
--------------------------------------------------------------------
FUNCTION "XNOR"  (l,r : fsim_ulogic_vector) RETURN fsim_ulogic_vector IS
  ALIAS lv : fsim_ulogic_vector (1 to l'LENGTH) IS l;
  ALIAS rv : fsim_ulogic_vector (1 to l'LENGTH) IS r;
  VARIABLE result : fsim_ulogic_vector (1 to l'LENGTH);
  VARIABLE val : fsim_ulogic;
  VARIABLE rnd : REAL;
BEGIN
  IF (l'LENGTH /= r'LENGTH) THEN
    ASSERT FALSE
    REPORT "arguments of overloaded function 'or' are not of the same length"
    SEVERITY FAILURE;
  ELSE
    FOR i IN result'RANGE LOOP
      val := not_table(xor_table(lv(i),rv(i)));
      rnd := getrand;
      IF (rnd > threshold) THEN val := (error_table(val)); END IF;
      result(i) := val;
    END LOOP;
  END IF;
  RETURN result;
END "XNOR";
  
FUNCTION "XNOR"  (l,r : fsim_logic_vector) RETURN fsim_logic_vector IS
  ALIAS lv : fsim_logic_vector (1 to l'LENGTH) IS l;
  ALIAS rv : fsim_logic_vector (1 to l'LENGTH) IS r;
  VARIABLE result : fsim_logic_vector (1 to l'LENGTH);
  VARIABLE val : fsim_logic;
  VARIABLE rnd : REAL;
BEGIN
  IF (l'LENGTH /= r'LENGTH) THEN
    ASSERT FALSE
    REPORT "arguments of overloaded function 'or' are not of the same length"
    SEVERITY FAILURE;
  ELSE
    FOR i IN result'RANGE LOOP
      val := not_table(and_table(lv(i),rv(i)));
      rnd := getrand;
      IF (rnd > threshold) THEN val := (error_table(val)); END IF;
      result(i) := val;
    END LOOP;
  END IF;
  RETURN result;
END "XNOR";
--------------------------------------------------------------------
FUNCTION "NOT"  (l : fsim_ulogic_vector) RETURN fsim_ulogic_vector IS
  ALIAS lv : fsim_ulogic_vector (1 to l'length) IS l;
  VARIABLE result : fsim_ulogic_vector (1 to l'length);
  VARIABLE val : fsim_ulogic;
  VARIABLE rnd : REAL;
BEGIN
  FOR i IN result'RANGE LOOP
    val := not_table(lv(i));
    rnd := getrand;
    IF (rnd > threshold) THEN val := (error_table(val)); END IF;
    result(i) := val;
  END LOOP;
  RETURN result;
END "NOT";

FUNCTION "NOT"  (l : fsim_logic_vector ) RETURN fsim_logic_vector IS
  ALIAS lv : fsim_logic_vector (1 to l'length) IS l;
  VARIABLE result : fsim_logic_vector (1 to l'length);
  VARIABLE val : fsim_logic;
  VARIABLE rnd : REAL;
BEGIN
  FOR i IN result'RANGE LOOP
    val := not_table(lv(i));
    rnd := getrand;
    IF (rnd > threshold) THEN val := (error_table(val)); END IF;
    result(i) := val;
  END LOOP;
  RETURN result;
END "NOT";
--------------------------------------------------------------------
--Type conversion functions
--------------------------------------------------------------------
CONSTANT tobit_table : tobitconv_table := ('0','0','0','1','0','0','0','1','0');
CONSTANT tofsim_logic_table : tofsim_logicconv_table := ('0','1');
--------------------------------------------------------------------
FUNCTION to_bit (l : fsim_ulogic) RETURN bit IS
BEGIN
  RETURN (tobit_table(l));
END to_bit;

FUNCTION to_bit_vector (l : fsim_ulogic_vector) RETURN bit_vector IS
  ALIAS lv : fsim_ulogic_vector (1 to l'LENGTH) IS l;
  VARIABLE result : bit_vector (1 to l'LENGTH);
BEGIN
  FOR i IN lv'RANGE LOOP
    result(i) := tobit_table(lv(i));
  END LOOP;
  RETURN result;
END to_bit_vector;

FUNCTION to_bit_vector (l : fsim_logic_vector) RETURN bit_vector IS
  ALIAS lv : fsim_logic_vector (1 to l'LENGTH) IS l;
  VARIABLE result : bit_vector (1 to l'LENGTH);
BEGIN
  FOR i IN lv'RANGE LOOP
    result(i) := tobit_table(lv(i));
  END LOOP;
  RETURN result;
END to_bit_vector;

FUNCTION to_fsim_ulogic (l : bit) RETURN fsim_ulogic IS
BEGIN
  RETURN (tofsim_logic_table(l));
END to_fsim_ulogic;

FUNCTION to_fsim_ulogic_vector (l : bit_vector) RETURN fsim_ulogic_vector IS
  ALIAS lv : bit_vector (1 to l'LENGTH) IS l;
  VARIABLE result : fsim_ulogic_vector (1 to l'LENGTH);
BEGIN
  FOR i IN lv'RANGE LOOP
    result(i) := tofsim_logic_table(lv(i));
  END LOOP;
  RETURN result;
END to_fsim_ulogic_vector;

FUNCTION to_fsim_logic_vector (l : bit_vector) RETURN fsim_logic_vector IS
  ALIAS lv : bit_vector (1 to l'LENGTH) IS l;
  VARIABLE result : fsim_logic_vector (1 to l'LENGTH);
BEGIN
  FOR i IN lv'RANGE LOOP
    result(i) := tofsim_logic_table(lv(i));
  END LOOP;
  RETURN result;
END to_fsim_logic_vector;
--------------------------------------------------------------------
-- Function to return random number


impure FUNCTION getrand RETURN real IS  
  VARIABLE vrandval : REAL;
BEGIN
  UNIFORM(seed1,seed2,vrandval);
  RETURN (vrandval);
END getrand;


END fsim_logic;