ENTITY fill8 IS PORT (clk : IN bit; clkd256 : IN bit; cerr : OUT bit; ncorerr : OUT bit); END fill8; ARCHITECTURE one OF fill8 IS --declare and configure 4-bit SED counter COMPONENT cnt8 PORT(clk : IN bit; cnt : OUT bit_vector(7 downto 0); dcnt : OUT bit_vector(7 downto 0); err : OUT bit); END COMPONENT; FOR all : cnt8 USE ENTITY work.cnt8(one); --declare and configure 4-bit SEC/DED counter COMPONENT sdadd8bit PORT (a,b : IN bit_vector(7 downto 0); abar,bbar : IN bit_vector(7 downto 0); sum : OUT bit_vector(7 downto 0); cout : OUT bit; corerr,ncorerr : OUT bit); END COMPONENT; FOR all : sdadd8bit USE ENTITY work.sdadd8bit(one); --Internal signals SIGNAL cnt,dcnt,cnt8d256,dcnt8d256 : bit_vector(7 downto 0); SIGNAL clk1err,clkd2err : bit; SIGNAL isum : bit_vector(7 downto 0); SIGNAL icout : bit; BEGIN c1 : cnt8 PORT MAP (clk,cnt,dcnt,clk1err); c2 : cnt8 PORT MAP (clkd256,cnt8d256,dcnt8d256,clkd2err); sda : sdadd8bit PORT MAP (cnt,cnt8d256,dcnt,dcnt8d256,isum,icout,cerr,ncorerr); END one;