Si-Based Resonant Interband Tunneling Diodes and Quantum Functional Circuits, Paul R. Berger

Advisor: Paul R. Berger Researchers: Evan Cornuelle (ECE Ph.D. candidate) Collaborators: Roger Loo (IMEC) Ngoc Duy Nguyen (IMEC) Shotaro Takeuchi (formerly IMEC) Matty Caymax (IMEC) Phillip E. Thompson (Naval Research Laboratory) Sean L. Rommel (Rochester Institute of Technology) Roger Lake (University of California at Riverside) Brad D. Weaver (Naval Research Laboratory) Santosh Kurinec (Rochester Institute of Technology) Karl D. Hirschman (Rochester Institute of Technology) David S. Simons (NIST) Zhaoqiang Fang (Wright State University) Former Graduate Students: Ms. Parastou Fakhimi (ECE Ph.D. 2019) Tyler Growden ((ECE Ph.D. 2018) Ms. Anisha Ramesh (ECE Ph.D. 2012) Si-Young Park (Master's Thesis 2006, Ph.D. 2009) Ronghua Yu (Physics Ph.D. 2007) Sung-Yong Chung (Master's Thesis 2002, Ph.D. 2005) Sandro Di Giacomo (Master's Thesis 2005) Niu Jin (Master's Thesis 2001, Ph.D. 2004) Anthony Rice (Master's Thesis 2003) Sean L. Rommel (Ph.D. 2000)

Click here or on the image above to link to a Powerpoint presentation summary of our RITD work (September 2017)

Importance of the Problem:

Continued scaling of CMOS transistors has increased their performance, but not lowered their operational voltage significantly. Indeed, power consumption issues challenge their efficacy in high-traffic mobile platforms, leading to reduced processor speeds to mitigate the constraints of batteries.

But, quantum functional circuits employing negative differential resistance (NDR) elements offers a new paradigm of computing that dramatically drops chip voltages to below 0.5 volt. Tunnel diodes are NDR devices that can meet this demand. Demonstrations of high speed and low power circuits using resonant tunneling diode (RTD) together with transistors have shown how the tunnel diode can boost the performance of a III-V transistor technology. The utility of the tunnel diode has been realized since the early nineteen sixties, but today Si-based tunnel diodes are used only in discrete form and for niche applications, such as high speed pulse and edge generation. However, the drawback to the tunnel diode has long been the difficulty in controlling peak current and the lack of an Si-based tunnel diode process that can be mass produced and monolithically integrated with transistors in CMOS integrated circuits.

This body of work overcomes those obstacles and prepares it for insertion into the marketplace.

More more background information, see:

• IEEE Spectrum: "Quantum Transistors: Towards Quantum Computing" (September 2000)
• IEEE Spectrum: "The Amazing Vanishing Transistor Act" (October 2002)

Brief Description of Our Work and Results:

Si/SiGe resonant interband tunnel diodes (RITD) employing delta-doping spikes that demonstrate negative differential resistance (NDR) at room temperature have been invented and optimized. Past efforts have focused on improving the tunnel diode peak-to-valley current ratio (PVCR) figure-of-merit, controlling the peak current density (PCD or J_p), as well as addressing issues of manufacturability and CMOS integration. Resonant interband tunneling diodes (RITD) on silicon substrates using a Si/Si_0.5Ge_0.5/Si heterostructure were grown by low temperature molecular beam epitaxy (LT-MBE) that is inherently compatible with CMOS and Si/SiGe heterojunction bipolar transistors (HBT). The RITDs utilized both a central intrinsic spacer and delta-doped injectors. A low substrate temperature of 320 ^oC was used during growth to ensure a high level of dopant incorporation and minmimize dopant segregation. A B delta-doping spike lowers the barrier for holes to populate the quantum well at the valence band discontinuity, and an Sb or P delta-doping spike reduces the doping requirement of the n-type bulk Si by producing a deep n⁺ well. But most recently, the MBE-grown RITD device has successfully been technology transferred to chemical vapor deposition (CVD), the standard of any Si/SiGe CMOS production line.

Past results of MBE grown Si/Si_0.5Ge_0.5/Si RITDs have shown PVCRs up to 4.0 at room temperature, and now CVD grown RITDs have PVCRs up to 5.2 at room temperature in conjunction with our collaborators at IMEC using a standard 200mm ASM tool. Also by modifying the central tunneling spacer thickness, the PCD can be readily controlled over seven orders of magnitude. Our group has demonstrated PCDs of Si/Si_0.5Ge_0.5/Si RITDs with peak current densities exceeding 218 kA/cm². This ultra-high current density is excellent for RF and mixed-signal applications. Ultra-low current density structures have also been realized with PCDs below 20 mA/cm². These ultra-low RITDs are excellent for low power consumption using tunneling static random access memory (T-SRAM) that is an excellent candidate for compact refresh-free embedded memory for system-on-a-chip (SOC).

Further, TSRAM memory circuit, monolithically integrated with CMOS, operating at below 0.5 volts have been realized.

Awards and Citations

• IEEE Fellow (2011), "for contributions to the understanding, development, and fabrication of silicon-based resonant interband tunneling devices and circuits"
• IEEE Distinguished Lecturer (2011-2014).
• Lumley Research Award, OSU College of Engineering, 2006 and 2011.
• Graduate Student, Anisha Ramesh, received the OSU Presidential Fellowship (2011).
• Graduate Student, S. Sudirgo (RIT), won Best Student Poster Award at the 2005 International Semiconductor Device Research Symposium in Washington, DC (December 7-9, 2005). Link to ISDRS .
• Graduate Student, S. Sudirgo (RIT), was a finalist for Best Student Paper Award at the 2003 International Semiconductor Device Research Symposium in Washington, DC (December 10-12, 2003). Link to ISDRS .
• Graduate Student, Sung-Yong Chung, was a finalist for Best Student Paper Award at the 2003 International Electron Devices in Washington, DC (December 8-10, 2003). Link to IEDM .
• Special Invitation to the Emerging Research Devices Workgroup as part of the International Technology Roadmap for Semiconductor (ITRS) to present a overview of the latest developments worldwide in Si-based tunnel diodes and circuit. (July 13-17, 2003, San Francisco, CA). Link to ITRS .
• Allan P. Colburn Prize for Best Dissertation in Engineering and Mathematical Sciences, (Sean L. Rommel, 2000).
• DARPA Ultra Electronics Program Award of Excellence, 1998

Patents

• "Tunneling Static Random Access Memory (TSRAM) Gain Cell," Paul R. Berger and Anisha Ramesh [Disclosure submitted August 3, 2010, Provisional patent filed September 10, 2010].

• "Si-based Tunneling Field Effect Transistor," Paul R. Berger [Disclosure submitted February 23, 2009, Provisional patent filed September 17, 2009, Full patent filed September 13, 2010].

• "Strained Si-based Resonant Interband Tunneling Diode on SiGe Virtual Substrate With Outside Barriers," Paul R. Berger, Niu Jin, and Phillip E. Thompson [Disclosure submitted November 29, 2006; Provisional patent filed July 17, 2007; Full patent filed July 16, 2008, U. S. Patent # 7,902,569]., Granted on March 8, 2011.
  • Description: This invention comprises the addition of strained Si and SiGe barriers, outside the tunnel junction, which lead to better carrier confinement and higher thermal budgets.

• "Strained Si-based Resonant Interband Tunneling Diode on SiGe Virtual Substrate With P-doping Cladding," Paul R. Berger, Niu Jin, and Phillip E. Thompson [Disclosure submitted November 29, 2006; Provisional patent filed July 17, 2007; Full patent filed July 16, 2008, U. S. Patent # 7,902,569]., Granted on March 8, 2011.
  • Description: This invention comprises the addition of strained Si cladding layers surrounding both sides of the P delta-doping spike to effectively provide outdiffusion barriers leading to better carrier confinement and higher thermal budgets.

• "Diffusion Barriers for Resonant Interband Tunnel Diodes," Paul R. Berger, Niu Jin, and Phillip E. Thompson U. S. Patent #7,297, 990, Granted on November 20, 2007.
  • Description: This invention comprises the addition of SiGe cladding layers surrounding both sides of the B delta-doping spike to effectively provide outdiffusion barriers leading to better carrier confinement and higher thermal budgets.

• "Method of Making Interband Tunneling Diodes," Paul R. Berger, Sean L. Rommel, Phillip E. Thompson, Karl D. Hobart, and Roger Lake, U. S. Patent #7,303,969, Granted on December 4, 2007.
  • Description: This invention comprises a novel tunnel diode fabrication method suitable for convenient implementation in integrated CMOS circuits as well as in Si/SiGe bipolar integrated circuits. This is achieved in a manner that accomplishes room temperature negative differential resistance, while concurrently achieving a practically-usable peak-to-valley current ratio. The resultant resonant interband tunnel diode is implemented with standard planar integration processes and equipment.

• "Si-Based Resonant Interband Tunneling Diodes and Method of Making Interband Tunneling Diodes," Paul R. Berger, Sean L. Rommel, Phillip E. Thompson, Karl D. Hobart, and Roger Lake, U. S. Patent #6,803,598, Granted on October 12, 2004.
  • Description: This invention comprises a novel tunnel diode structure suitable for convenient implementation in integrated CMOS circuits as well as in Si/SiGe bipolar integrated circuits. This is achieved in a manner that accomplishes room temperature negative differential resistance, while concurrently achieving a practically-usable peak-to-valley current ratio. The resultant resonant interband tunnel diode is implemented with standard planar integration processes and equipment.

Book Sections

1. Negative Differential Resistance Devices and Circuits, Paul R. Berger and R. Anisha, Comprehensive Semiconductor Science and Technology, edited by Pallab. Bhattacharya, Roberto Fornari and Hiroshi Kamimura, Elsevier, Volume 5, Chapter 13, pp. 176-241 (2011).

Publications

1. "Room Temperature Operation of Epitaxially Grown Si/Si_0.5Ge_0.5/Si Resonant Interband Tunneling Diodes," Sean L. Rommel, Thomas E. Dillon, M. W. Dashiell, H. Feng, J. Kolodzey, Paul R. Berger, Phillip E. Thompson, Karl D. Hobart, Roger Lake, Alan C. Seabaugh, Gerhard Klimeck, and Daniel K. Blanks, Applied Physics Letters, 73, pp. 2191-2193 (October 12, 1998). PDF (71 kB) [, Cited 177 times]

2. "90nm 32x322 bit Tunneling SRAM Memory Array with 0.5ns write access time, 1 ns read access i time and 0.5 Volt Operation," R. Anisha, Si-Young Park, Paul R. Berger, IEEE Transactions on Circuits and Systems I, vol. 58, pp. 2432-2445 (October 2011). PDF (2273 kB) [, First in-depth TSRAM array analysis]

3. "Analysis of Voltage Swing in Si/SiGe Resonant Interband Tunnel Diodes," Sung-Yong Chung, Niu Jin, Ryan E. Pavlovicz, Ronghua Yu, Paul R. Berger, and Phillip E. Thompson, IEEE Transactions on Nanotechnology, 6, pp. 158-163 (March 2007). PDF (976 kB)

4. "The Effect of Spacer Thickness on Si-based Resonant Interband Tunneling Diode Performance and their Application to Low-Power Tunneling Diode SRAM Circuits," Niu Jin, Sung-Yong Chung, Ronghua Yu, Roux M. Heyns, Paul R. Berger, and Phillip E. Thompson, IEEE Transactions on Electron Devices, 53, pp. 2243-2249 (September 2006). PDF (243 kB)

5. "Phosphorus Diffusion in Si-Based Resonant Interband Tunneling Diodes and Tri-State Logic Using Vertically Stacked Diodes," Niu Jin, Sung-Yong Chung, Roux M. Heyns, Paul R. Berger, Ronghua Yu, Phillip E. Thompson, and Sean L. Rommel, Materials Science in Semiconductor Processing, 8, pp. 411-416 (2005). PDF (227 kB)

6. "Improved Vertically Stacked and Serially Connected Si/SiGe Resonant Interband Tunneling Diode Pair Showing Small Peak Shift and Unequal Peak Currents," Niu Jin, Sung-Yong Chung, Ronghua Yu, Paul R. Berger, and Phillip E. Thompson, Electronics Letters, 40, pp. 1548-1549 (November 25, 2004). PDF (229 kB)

7. "Tri-State Logic Using Vertically Integrated Si Resonant Interband Tunneling Diodes with Double NDR," Niu Jin, Sung-Yong Chung, Roux M. Heyns, and Paul R. Berger, Ronghua Yu, Phillip E. Thompson, and Sean L. Rommel, IEEE Electron Device Letters, 25, pp. 646-648 (September 2004). PDF (108 kB) [cited 32 times]

8. "A PNP Si Resonant Interband Tunnel Diode with Symmetrical NDR," Niu Jin, Paul R. Berger, Sean L. Rommel, Phillip E. Thompson and Karl D. Hobart, Electronics Letters , 37, pp. 1412-1414 (November 8, 2001). PDF (441 kB)

9. "High 5.2 Peak-to-Valley Current Ratio in Si/SiGe Resonant Interband Tunnel Diodes Grown by Chemical Vapor Deposition," Anisha Ramesh, Paul R. Berger, and Roger Loo, Applied Physics Letters, vol. 100, 092104 (March 1, 2012). PDF (759 kB) [, High room temperature PVCR with standard ASM 200mm CVD tool]

10. "Boron Delta-Doping Dependence on Si/SiGe Resonant Interband Tunneling Diodes Grown by Chemical Vapor Deposition," Anisha Ramesh, Tyler Growden, Paul R. Berger, Roger Loo, Bastien Douhard, Matty Caymax, IEEE Transactions on Electron Devices, vol. 59, pp. 602-609 (March 2012). PDF (839 kB)

11. "Si/SiGe Resonant Interband Tunneling Diodes Incorporating Delta-Doping Layers Grown by Chemical Vapor Deposition," Si-Young Park, R. Anisha, Paul R. Berger, Roger Loo, Ngoc Duy Nguyen, Shotaro Takeuchi, and Matty Caymax, IEEE Electron Device Letters, 30, pp. 1173-1175 (November 2009). PDF (145 kB)

12. "Si/SiGe Resonant Interband Tunnel Diode with f_r0 20.2 GHz and Peak Current Density 218 kA/cm² for K-band Mixed-Signal Applications," Sung-Yong Chung, Ronghua Yu, Niu Jin, Si-Young Park, Paul R. Berger, and Phillip E. Thompson, IEEE Electron Device Letters, 27, pp. 364-367 (May 2006). PDF (146 kB) [cited 22 times]

13. "RF Performance and Modeling of Si/SiGe Resonant Interband Tunneling Diodes," Niu Jin, Sung-yong Chung, Ronghua Yu, Sandro J. Di Giacomo, Paul R. Berger, and Phillip E. Thompson, IEEE Transactions on Electron Devices, 52, pp. 2129-2135 (October 2005). PDF (615 kB)

14. "Temperature Dependent DC/RF Performance of Si/SiGe Resonant Interband Tunneling Diodes," Niu Jin, Sung-Yong Chung, Ronghua Yu, Paul R. Berger, and Phillip E. Thompson, Electronics Letters, 41, pp. 63-64 (April 28, 2005). PDF (1,617 kB)

15. "Integration of Si/SiGe HBT and Si-based RITD Demonstrating Controllable Negative Differential Resistance for Wireless Applications," Sung-Yong Chung, Si-Young Park, Jeffrey W. Daulton, Ronghua Yu, Paul R. Berger, and Phillip E. Thompson, Solid State Electronics, 50, pp. 973-978 (June 2006). PDF (168 kB)

16. "Monolithically Integrated Si/SiGe Resonant Interband Tunnel Diode/CMOS Demonstrating Low Voltage MOBILE Operation," S. Sudirgo, R.P. Nandgaonkar, B. Curanovic, J.L. Hebding, R.L. Saxer, S.S. Islam, K.D. Hirschman, S.L. Rommel, S.K. Kurinec, P.E. Thompson, N. Jin, and P.R. Berger, Solid State Electronics, 48, pp. 1907-1910 (October/November 2004). PDF (296 kB)

17. "3-Terminal Si-Based Negative Differential Resistance Circuit Element with Adjustable Peak-To-Valley Current Ratios Using a Monolithic Vertical Integration," Sung-Yong Chung, Niu Jin, and Paul R. Berger, Ronghua Yu, Phillip E. Thompson, Roger Lake, Sean L. Rommel and Santosh K. Kurinec, Applied Physics Letters , 84 , pp. 2688-2690 (April 5, 2004). PDF (64 kB)

18. "P and B doped Si Resonant Interband Tunnel Diodes with As-grown Negative Differential Resistance," Phillip E. Thompson, Glenn G. Jernigan, Si-Young Park, Ronghua Yu, R. Anisha, Paul R. Berger, David Pawlik, Raymond Krom, and Sean L. Rommel, Electronics Letters, 45, pp. 759-761 (July 2, 2009). PDF (189 kB)

19. "Strain Engineered Si/SiGe Resonant Interband Tunneling Diodes with Outside Barriers Grown on Si_0.8Ge_0.2 Virtual Substrates," R. Anisha, Niu Jin, Sung-Yong Chung, Ronghua Yu, Paul R. Berger, and Phillip E. Thompson, Applied Physics Letters, 93, 102113 (September 11, 2008). PDF (102 kB)

20. "Strain Engineered Si/SiGe Resonant Interband Tunneling Diodes Grown on Si_0.8Ge_0.2 Virtual Substrates," Niu Jin, Ronghua Yu, Sung-Yong Chung, Paul R. Berger, and Phillip E. Thompson, IEEE Electron Device Letters, 29, pp. 599-602 (June 2008). PDF (169 kB)

21. "Low Sidewall Damage Plasma Etching Using ICP-RIE with an HBr Chemistry of Si/SiGe Resonant Interband Tunnel Diodes," Si-Young Park, Sung-Yong Chung, Ronghua Yu, Paul R. Berger, and Phillip E. Thompson," Electronics Letters, 42, pp. 69-70 (June 8, 2006). PDF (143 kB)

22. "151 kA/cm² Peak Current Densities in Si/SiGe Resonant Interband Tunneling Diodes for High-Power Mixed-Signal Applications," Niu Jin, Sung-Yong Chung, Anthony T. Rice, Paul R. Berger, Ronghua Yu, Phillip E. Thompson, and Roger Lake, Applied Physics Letters, 83, pp. 3308-3310 (October 20, 2003). PDF (61 kB) [cited 38 times]

23. "Diffusion Barrier Cladding in Si/SiGe Resonant Interband Tunneling Diodes And Their Patterned Growth on PMOS Source/Drain Regions," Niu Jin, Sung-Yong Chung, Anthony T. Rice, Paul R. Berger, Phillip E. Thompson, Cristian Rivas, Roger Lake, Stephen Sudirgo, Jeremy J. Kempisty, Branislav Curanovic, Sean L. Rommel, Karl D. Hirschman, Santosh K. Kurinec, Peter H. Chi and David S. Simons, Special Issue on "Nanoelectronics" in IEEE Transactions on Electron Devices, 50, pp. 1876-1884 (September 2003). PDF (377 kB) [cited 43 times]

24. "A P-on-N Si Interband Tunnel Diode Grown by Molecular Beam Epitaxy," K. D. Hobart, P. E. Thompson, S. L. Rommel, T. E. Dillon, P. R. Berger, D. S. Simons and P. H. Chi, Journal of Vacuum Science and Technology B, 19, pp. 290-293 (Jan/Feb 2001). PDF (58 kB)

25. "Epitaxial Si-Based Tunnel Diodes," P. E. Thompson, K. D. Hobart, M. E. Twigg, S. L. Rommel, N. Jin, P. R. Berger, R. Lake, A. C. Seabaugh, P. H. Chi and D. S. Simons, Thin Solid Films, 380, pp. 145-150 (December 22, 2000). PDF (273 kB)

26. "Current Voltage Characteristics of High Current Density Silicon Esaki Diodes Grown by Molecular Beam Epitaxy and the Influence of Thermal Annealing," M. W. Dashiell, R. T. Troeger, S. L. Rommel, T. N. Adam, P. R. Berger, J. Kolodzey, A. C. Seabaugh and R. Lake, IEEE Transactions on Electron Devices , 47, pp. 1707-1714 (September 2000). PDF (178 kB)

27. "Si Resonant Interband Tunnel Diodes Grown by Low Temperature Molecular Beam Epitaxy," Phillip E. Thompson, Karl D. Hobart, Mark Twigg, Glenn Jernigan, Thomas E. Dillon, Sean L. Rommel, Paul R. Berger, David S. Simons, Roger Lake and Alan C. Seabaugh, Applied Physics Letters, 75, pp. 1308-1310 (August 30, 1999). PDF (46 kB)

28. "Epitaxially Grown Si Resonant Interband Tunnel Diodes Exhibiting High Current Densities," Sean L. Rommel, Thomas E. Dillon, Paul R. Berger, Phillip E. Thompson, Karl D. Hobart, Roger Lake, and Alan C. Seabaugh, IEEE Electron Device Letters, 20, pp. 329-331 (July 1999). PDF (75 kB)

29. "Observation of Strain in Pseudomorphic Si_1-xGe_x by Tracking Phonon Participation in Si/SiGe Resonant Interband Tunnel Diodes via Electron Tunneling Spectroscopy," Ronghua Yu, R. Anisha, Niu Jin, Sung-Yong Chung, Paul R. Berger, Thomas J. Gramila, Phillip E. Thompson, Journal of Applied Physics, 106, 034501 (August 1, 2009). PDF (335 kB)

30. "Annealing Effect on Defects in Si Grown by Low Temperature Molecular Beam Epitaxy and its Attribution to the Excess Currents in Si-Based Tunnel Diodes," Sung-Yong Chung, Niu Jin, Ryan E. Pavlovicz, Paul R. Berger, Ronghua Yu, Zhaoqiang Fang, Phillip E. Thompson, Journal of Applied Physics, 96, pp. 747-753 (July 1, 2004). PDF (99 kB)

31. "Radiation Tolerance of Si/Si_0.6Ge_0.4 Resonant Interband Tunneling Diodes," B. D. Weaver, P. E. Thompson, N. Jin, S-Y. Chung, A. T. Rice, and P. R. Berger, Journal of Applied Physics , 95 , pp. 6406-6408 (June 1, 2004). PDF (52 kB)

32. "Full Band Modeling of the Excess Current in a Delta-Doped Silicon Tunnel Diode," Cristian Rivas and Roger Lake, William R. Frensley, Gerhard Klimeck, Phillip E. Thompson, Karl D. Hobart, Sean L. Rommel, and Paul R. Berger, Journal of Applied Physics, 94, pp. 5005-5013 (October 15, 2003). PDF (155 kB).

33. "Growth Temperature and Dopant Species Effects on Deep-Levels in Si Grown by Low Temperature Molecular Beam Epitaxy," Sung-Yong Chung, Niu Jin, Anthony T. Rice, Paul R. Berger, Ronghua Yu, Z-Q. Fang, and Phillip E. Thompson, Journal of Applied Physics , 93, pp. 9104-9110 (June 2003). PDF (93 kB)

34. "Full Band Simulation of Indirect Phonon Assisted Tunneling in a Silicon Tunnel Diode with Delta-Doped Contacts," Cristian Rivas, Roger Lake, Gerhard Klmeck, William R. Frensley, Massimo V. Fischetti, Phillip E. Thompson, Sean L. Rommel and Paul R. Berger, Applied Physics Letters , 78, pp. 814-816 (February 5, 2001). PDF (97 kB)

Plenary Talks

1. "Quantum Tunneling Electronics for Ultra-Low Power Scaled CMOS," Paul R. Berger, The International Workshop on the Physics of Semiconductor Devices at Kanpur, India (December 18-22, 2011).

Invited Talks

2. "Tunneling Based Devices for Next Generation Quantum Functionality," Paul R. Berger, 2009 SEMICON, Symposium on Emerging Semiconductor Technologies at ISTC/CSTIC, Shanghai, China, (March 17-19, 2009).

3. "Si-based Tunnel Junction Devices for Sub-Terahertz Communication and Imaging," Paul R. Berger and Phillip E. Thompson , SPIE's Optics East 2006: Terahertz Physics, Devices, and Systems, Boston, MA (December 2-4, 2006). SPIE Terahertz Conference website

4. "Extending CMOS: Quantum Functional Circuits using Si-based Resonant Interband Tunnel Diodes," Paul R. Berger, ESF Exploratory Workshop, Physical and Engineering Sciences (PESC), Silicon/oxide Hetero-Epitaxy: A New Road Towards a Si CMOS-Compatible Resonant Tunnel Diode Technology?, Villa Olmo, Como, Italy (September 12-13, 2006). ESF Conference website

5. "Nanoelectronics: Extending CMOS with Quantum Functional Circuits and Replacing CMOS with Nanoswitches," Paul R. Berger, IEEE - Columbus Section 2005 Spring Symposium "Nanotechnology in Ohio", Columbus, OH (May 14, 2005).

6. "Extending CMOS Using Tunneling Devices," Paul R. Berger, Frontier Science Research Conference in Materials Science and Technology in La Jolla, CA (2001).

7. "Epitaxial Si-Based Tunnel Diodes," Phillip E. Thompson, Karl D. Hobart, Sean L. Rommel, Paul R. Berger, Roger Lake, Alan Seabaugh, Peter H. Chi, and David S. Simons, European Materials Research Society Spring Meeting in Strasbourg, France (2000).

8. "Current Status of Si-based Tunnel Diodes," Paul R. Berger, SRC's Si Tunnel Diode and CMOS/HBT Integration Workshop in Washington, DC (1999).

Conference Presentations

9. "200-mm CVD Grown Si/SiGe Resonant Interband Tunnel Diodes optimized for High Peak-to-Valley Current Ratios," Anisha Ramesh, Paul R. Berger, Wilfried Vandervorst and Roger Loo, 2012 International SiGe Technology and Device Meeting (ISTDM), Berkeley, CA, USA (June 4-6, 2012). [, High room temperature PVCR with standard ASM 200mm CVD tool]

10. "200mm Si/SiGe Resonant Interband Tunneling Diodes Incorporating Delta-Doping Layers Grown by CVD," Si-Young Park, R. Anisha, Paul R. Berger, Roger Loo, Ngoc Duy Nguyen, Shotaro Takeuchi, and Matty Caymax, ICSI-6, 6th International Conference on Silicon Epitaxy and Heterostructures, Los Angeles (May 17-22, 2009).

11. "Simplified Si Resonant Interband Tunnel Diodes," Phillip E. Thompson, Glenn G. Jernigan, Si-Young Park, Ronghua Yu, R. Anisha, Paul R. Berger, David Pawlik, Raymond Krom, and Sean L. Rommel, International Semiconductor Device Research Symposium (ISDRS) at College Park, MD, Dec. 12-14, 2007.

12. "Anneal Time Study of Si Resonant Interband Tunnel Diodes Grown by Low-Temperature Molecular-Beam Epitaxy", R. Krom, D. J. Pawlik, S. Muhkerjee, S. Pandharpure, S. K. Kurinec, S-Y. Park, N. Jin, R. Yu, R. Anisha, P. R. Berger, P. E. Thompson, and S. L. Rommel, International Semiconductor Device Research Symposium (ISDRS) at College Park, MD, Dec. 12-14, 2007. Nominated for Best Student Paper Award .

13. "Temperature Dependent Empirical Modeling of Proximity Diffused Si Esaki Diodes and Memory Circuits", D. J. Pawlik, S. Muhkerjee, R. Krom, S. Pandharpure, S. K. Kurinec, R. Anisha, P. R. Berger, and S. L. Rommel, International Semiconductor Device Research Symposium (ISDRS) at College Park, MD, Dec. 12-14, 2007.

14. "NMOS/SiGe Resonant Interband Tunneling Diode Static Random Access Memory," S. Sudirgo, D.J. Pawlik, S.K. Kurinec, P.E. Thompson, J.W. Daulton, S.Y. Park, R. Yu, P.R. Berger, and S.L. Rommel, Device Research Conference at Pennsylvania State University (June 2006). PDF (2046 kB) [, First monolithic TSRAM]

15. "Analysis of the Biasing Conditions and Latching Operation for Si/SiGe Resonant Interband Tunnel Diode Based Tunneling SRAM," S. Sudirgo, D.J. Pawlik, S.L. Rommel, S.K. Kurinec, P.E. Thompson, and P.R. Berger, International Semiconductor Device Research Symposium in Bethesda, MD (December 7-9, 2005).

16. "High Temperature Characterization of Si/SiGe Resonant Interband Tunnel Diodes," D.J. Pawlik, S. Sudirgo, S.K. Kurinec, P.E. Thompson, P.R. Berger, and S.L. Rommel, International Semiconductor Device Research Symposium in Bethesda, MD (December 7-9, 2005).

17. "Monolithic Si/SiGe HBT-RITD Circuit with Controllable Negative Differential Resistance For Voltage Controlled Oscillator Applications," Sung-Yong Chung, Si-Young Park, Jeffrey W. Daulton, Ronghua Yu, Paul R. Berger, and Phillip E. Thompson, International Semiconductor Device Research Symposium in Bethesda, MD (December 7-9, 2005).

18. "Si-based Resonant Interband Tunnel Diode with Cutoff Frequency over 20 GHz and Estimated Peak Current Density of 218 kA/cm²," Sung-Yong Chung, Ronghua Yu, Niu Jin, Si-Young Park, Paul R. Berger, Phillip E. Thompson, International Semiconductor Device Research Symposium in Bethesda, MD (December 7-9, 2005).

19. "Low Sidewall Damage Plasma Etching with ICP-RIE and HBr Chemistry of Si/SiGe Resonant Interband Tunnel Diodes," Si-Young Park, Sung-Yong Chung, Ronghua Yu, Paul R. Berger, and Phillip E. Thompson, International Semiconductor Device Research Symposium in Bethesda, MD (December 7-9, 2005).

20. "A Unified Model for Si-based Resonant Interband Tunneling Diodes Grown on SOI," Niu Jin, Sung-Yong Chung, Dongmin Liu, Wu Lu, Ronghua Yu, Paul R. Berger, and Phillip E. Thompson, 2004 Device Research Conference at Notre Dame, IN (June 2004).

21. "Multi-State Logic Using Vertically Integrated Si/SiGe Resonant Interband Tunneling Diodes," Niu Jin, Sung-Yong Chung, Roux M. Heyns, Paul R. Berger, Ronghua Yu, Phillip E. Thompson, and Sean L. Rommel, Second International SiGe Technology and Device Meeting (ISTDM 2004) in Frankfurt (Oder), Germany (May 16 - 19, 2004).

22. "Monolithically Integrated Si/SiGe Resonant Interband Tunneling Diodes/CMOS MOBILE Latch with High Voltage Swing," S. Sudirgo, R.P. Nandgaonkar, B. Curanovic, J. Hebding, K.D. Hirschman, S.S. Islam, S.L. Rommel, S.K. Kurinec, P.E. Thompson, N. Jin, and P.R. Berger, 2003 International Semiconductor Device Research Symposium in Washington, DC (December 10-12, 2003).

23. "Monolithic Vertical Integration of Si/SiGe HBT and Si-Based Resonant Interband Tunneling Diode Demonstrating Latching Operation and Adjustable Peak-To-Valley Current Ratios," Sung-Yong Chung, Niu Jin, Ronghua Yu, Paul R. Berger, Phillip E. Thompson, Roger Lake, Sean L. Rommel and Santosh K. Kurinec, 2003 International Electron Devices in Washington, DC.

24. "Challenges in Integration of Resonant Interband Tunnel Devices with CMOS," Stephen Sudirgo, Branislav Curanovic, Sean L. Rommel, Karl D. Hirschman, Santosh K. Kurinec, Niu Jin, Anthony T. Rice, Matthew T. Williams. Ling F. Kho, Sung-Yong Chung, Ronghua Yu, Paul R. Berger, and Phillip E. Thompson, The Fifthteenth Biennial University/Government/Industry Microelectronics Symposium in Boise, Idaho (June 30 - July 2, 2003).

25. "MBE Growth Techniques to Form Si/SiGe Resonant Interband Tunneling Diodes with High Peak Current Densities and High Peak-to-Valley Current Ratios," Phillip E. Thompson, Niu Jin, Ronghua Yu, Sung-Yong Chung, Anthony T. Rice, Paul R. Berger, Roger Lake, Peter H. Chi and David S. Simons, 3rd International SiGeC Epitaxy and Heterostructures Conference in Santa Fe, NM (March 9-12, 2003)

26. "Growth Temperature Effects on Deep-Levels in Si Grown by Low Temperature Molecular Beam Epitaxy," Sung-Yong Chung, Paul R. Berger, Z-Q. Fang, and Phillip E. Thompson, Fall MRS Meeting in Boston, MA (December 2-6, 2002).

27. "SiGe Diffusion Barriers for P-doped Si/SiGe Resonant Interband Tunnel Diodes," Niu Jin, Anthony T. Rice, Paul R. Berger, Phillip E. Thompson, Peter H. Chi and David S. Simons, IEEE Lester Eastman Conference on High Performance Device in Newark, DE (August 6-8, 2002).

28. "Integration of Silicon-based Tunnel Diodes with CMOS: An RIT-OSU-NRL-NSF Effort," Jeremy J. Kempisty, Karl D. Hirschman, Santosh K. Kurinec, Niu Jin, Sung-Yong Chung, Paul R. Berger, Phillip E. Thompson, The Fourteenth Biennial University/Government/Industry Microelectronics Symposium, at Richmond, VA (June 17-20, 2001).

29. "Understanding Growth at the Atomic Scale: Si-based RITDs," P. E. Thompson, G. G. Jernigan, M. E. Twigg, N. Jin, and P. R. Berger, March 2001 Meeting of the American Physical Society (March 12-16, 2001).

30. "Development of Delta-B/i-Si/Delta-Sb and Delta-B/i-Si/Delta-Sb/i-Si/Delta-B Resonant Interband Tunnel Diodes For Integrated Circuit Applications," Sean L. Rommel, Niu Jin, T. E. Dillon, Sandro J. Di Giacomo, Joel Banyai, Bryan M. Cord, C. D'Imperio, D. J. Hancock, N. Kirpalani, V. Emanuele, Paul R. Berger, Phillip E. Thompson, Karl D. Hobart, and Roger Lake, 58th Annual Device Research Conference in Denver, CO (June 19-21, 2000). PDF (208 kB)

31. "Si-Based Interband Tunneling Devices For High-Speed Logic and Low Power Memory Applications," Sean L. Rommel, Thomas E. Dillon, Paul R. Berger, Roger Lake, Phillip E. Thompson, Karl D. Hobart, Alan C. Seabaugh, and David S. Simons, Late News at the International Electron Devices in San Francisco, CA (December 6-9, 1998). PDF (468 kB)

32. "Demonstration of Room Temperature NDR in Si_0.5Ge_0.5/Si Heterojunction Interband Tunneling Diodes Using Delta-doped Si Injectors," Sean L. Rommel, T. E. Dillon III, M. W. Dashiell, H. Feng, J. Kolodzey, Paul R. Berger, Phillip E. Thompson, K. D. Hobart, Roger Lake, and Alan Seabaugh, Late News at 1998 IEEE Silicon Nanoelectronics Workshop in Honolulu, HI, (June 7-8, 1998).

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